i-manager's Journal on Electronics Engineering (JELE)


Volume 9 Issue 2 December - February 2019

Research Paper

A Comparison of CNTFET Models through a Simulation Study of Digital Circuits

Roberto Marani*, Anna Gina Perri**
*Researcher, Institute of Intelligent Industrial Technologies and Systems for Advanced Manufacturing (STIIMA), National Research Council of Italy.
**Full Professor of Electronics and Head of Electronic Devices Laboratory, Department of Electrical and Information Engineering, Polytechnic University of Bari, Italy.
Marani,R.,Perri,A.G.(2019).A Comparison of CNTFET Models through a Simulation Study of Digital Circuits.i-manager’s Journal on Electronics Engineering,9(2),1-11.

Abstract

In this paper we present a simulation study in order to carry out static and dynamic analysis of CNTFET-based digital circuits, introducing in the semi-empirical compact model for CNTFETs, already proposed, both the quantum capacitance effects and the sub-threshold currents. To verify the validity of the obtained results, they are compared with those of the Stanford- Source Virtual Carbon Nanotube Field-Effect Transistor model (VS-CNFET). This comparison is made through some simulations of digital circuits. In particular we consider XOR gate, but emphasizing that the proposed procedure can be applied to any logic gate based on CNTFET. As regards the static conditions, the two models behave in a manner virtually identical, while, as regards the dynamic analysis, we have remarkable differences between two models in terms of propagation delays and rise and fall times.

Article

Contemplation on Smart Toll Collection Strategies and Enhancement

S. Bhusnur*, Mohil Kumar Verma**, Rakesh Anand***, Amit Kumar Barnwal****
*_***UG Scholar, Department of Electrical and Electronics Engineering, Bhilai Institute of Technology, Durg,India.
****Professor,Department of Electrical and Electronics Engineering, Bhilai Institute of Technology, Durg, India.
Verma,M.,Anand,R.,Barnwal,A.,Bhusnur,S.(2019).Contemplation on Smart Toll Collection Strategies and Enhancement.i-manager’s Journal on Electronics Engineering,9(2),12-20.

Abstract

The problem of managing smart toll lanes is one of the crucial topics of researchers and transportation industry. This paper provides an insight to various strategies involved in smart toll collection system (STCS). One of the most widely used techniques for STCS is the Radio frequency identification (RFID) technique. A small prototype hardware realizationof STCS is delineated to make the basics discernible. This paper describes the toll collection system based on distance travelled by the vehicle using RFID technology. The vehicle will hold a unique identification number assigned to the vehicle by traffic governing authority. All basic information as well as prepaid account details to ensure payment against toll tax incurred, is stored in the data base of the STCS. The unique tag number is read by the RFID reader at both entry and exit of the toll road and gate number will be stored in database. At the time of exit the distance will be calculated by the micro- controller. The billing amount is then displayed, balance is deducted from the prepaid balance and new balance is updated. This paper is a short communication to enable a novice to decipher the details involved in STCS in a facile manner.

Research Paper

IoT Based Smart Health Monitoring System

U. B. Mahadewaswamy*, Zaibabuktiyar Durgad**
*Professor, Department of Electronics and Communication, JSSS&TU, Mysuru, India.
**PG Scholar, Department of Electronics and Communication, JSSS&TU, Mysuru,India.
Mahadevaswamy,U.B., Durgad,Z.,(2019).IoT Based Smart Health Monitoring System.i-manager’s Journal on Electronics Engineering,9(2),21-44.

Abstract

Globalization around the world has led to the number of spontaneous technologies. Among them artificial intelligence is one such technique which can be implemented through IOT. Aim of this work is to design and develop a system which performs the tasks of measurement of vital parameters such as temperature, blood pressure and heart rate. The measured values are continuously updated on thingspeak server using Wi-Fi module and in case of abnormalities the information is conveyed to the concerned doctor through SMS using GSM module. An alert call is also initiated to the doctor after a couple of minutes. The system also has an inbuilt pill tracker unit which alerts the patient at right time to take the prescribed tablet it also warns the patient in case of wrong tablet selection. Simultaneously the message regarding wrong tablet selection is sent to the caretaker. The system is also programmed to measure and categorize the nature of blood pressure. The performance of the system with respect to the measurement of blood pressure, heart rate and temperature is evaluated under the supervision of a qualified physician, the readings recorded by the system are compared with the observations recorded by the physician using conventional methods. The application of the system as pill tracker is studied by considering a patient with multiple ailments.

Research Paper

Low Power Design for Testability Implementation for Asynchronous FIFO

Madhu Kumar Patnala*, Ralla Nagendra**
*_** Assistant Professor,Department of Electronics and Communication Engineering ,Sree Vidyanikethan Engineering College (Autonomous) ,Tirupati, AP,India.
Patnala,M.K.,Nagendra,R.(2019).Low Power Design for Testability Implementation for Asynchronous FIFO.i-manager’s Journal on Electronics Engineering,9(2),45-54.

Abstract

A First in First out (FIFO) is used as a memory buffer between two asynchronous systems with simultaneous write and read access to and from the FIFO where these accesses being independent of one another. Sequential operation of FIFO is particularly useful for implementing system level functions like Packet Buffering, Frequency Coupling and Bus matching. Asynchronous FIFO is a memory file which uses synchronization for reading and writing with different clocks, by performing the conditions of over-run and under-run. In essence, the transfer of data from read domain to write domain with different frequencies. To generate overrun and under-run status flags the synchronization takes place with the help of “preceding operation” of both the write and read pointers. In this design the gray code converters are used to reduce switching activity and the low power Design for Testability (DFT) technique was applied by considering the two phases that is scan insertion and ATPG Simulations. This design is executed by using synthesizable VERILOG (Register Transfer Level) RTL Code and verified with XILINX ISE simulator.

Research Paper

Energy Efficiency and Enhancement in Cognitive Radio Cellular Set-Up

G. Karpagarajesh*, S.Narmatha **, A.V.Niranjana ***, M.Ramya ****, P.Sivagami*****
*Assitant Professor, Department of ECE,Government College of Engineering, Tirunelveli, India.
**_***** UG Scholar,Department of ECE, Government College of Engineering, Tirunelveli, India.
Karpagarajesh,G.,Narmatha,S.,Niranjana,A.V.,Ramya,M.,Sivagami,P.(2019). Energy Efficiency and Enhancement in Cognitive Radio Cellular Set-Up.i-manager’s Journal on Electronics Engineering,9(2),55-68.

Abstract

As the quantity of mobile clients increments exponentially, improving the pectrum effectiveness was more important by keeping in mind the end goal to suit more clients. In this paper, by abusing the collaboration between Principle Base Stations (PBS) and Minor Base Stations (MBS), another vitality range exchanging model was proposed to upgrade the vitality and also range proficiency of cell systems. By utilizing cognitive radio, PBS shares some part of their authorized range with MBS. MBS in return to give information administration to the rule clients under their scope. Efficient power Energy Attentive Request(GEAR) and Adaptive Request Allocation (ARA) calculations are the calculations to accomplish a decent estimation of the ideal arrangement in less time.